ao4932 asymmetric dual n-channel mosfet general description product summary fet1(n-channel) fet2(n-channel) v ds = 30v 30v i d = 11a (v gs =10v) 8a (v gs =10v) r ds(on) r ds(on) < 12.5m (v gs =10v) < 19m (vgs=10v) < 15m (v gs =4.5v) < 23m (vgs=4.5v) 100% uis tested 100% uis tested 100% r g tested 100% r g tested the ao4932 uses advanced trench technology to provi de excellent r ds(on) and low gate charge. the two mosfets make a compact and efficient switch and synchronous rectifier combination for use in dc-dc converters. a monolithically integrated schottky diode in paralle l with the synchronous mosfet to boost efficiency further. soic-8 top view bottom view srfet tm g1 d2 d2 s2/d1 s2/d1 g2 top view srfet tm s oft r ecovery mos fet : integrated schottky diode d2 d1 symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jl maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 32 40 74 90 r q ja 48 maximum junction-to-ambient a 62.5 c/w thermal characteristics parameter typ max units c a mj avalanche energy l=0.1mh c -55 to 150 t a =70c 11 junction and storage temperature range power dissipation b 2 1.3 p d t a =25c 1.3 18 2 30 8 a 20 v 6.5 40 19 w v 12 absolute maximum ratings t a =25c unless otherwise noted max fe1 drain-source voltage 30 max fet2 gate-source voltage units parameter pulsed drain current c continuous drain current avalanche current c 11 i d t a =25c t a =70c 9 60 15 pin1 s1 g1 s2/d1 s2/d1 g2 s2 g1 s1 rev 4: nov 2011 www.aosmd.com page 1 of 9
ao4932 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 0.5 t j =125c 500 i gss 100 na v gs(th) gate threshold voltage 1.1 1.65 2.1 v i d(on) 60 a 10 12.5 t j =125c 15 18 12 15 m w g fs 75 s v sd 0.4 0.7 v i s 4 a c iss 930 1170 1400 pf c oss 90 128 170 pf c rss 45 89 125 pf r g 0.7 1.4 2.1 w q g (10v) 16 20 24 nc q g (4.5v) 7 8.7 10.5 nc q gs 3.2 nc q gd 3 nc t d(on) 6 ns turn-on delaytime switching parameters gate resistance v gs =0v, v ds =0v, f=1mhz output capacitance v ds =0v, v gs = 12v v ds =v gs i d =250 m a input capacitance total gate charge v gs =10v, v ds =15v, i d =11a gate source charge gate drain charge total gate charge fet1 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions dynamic parameters v gs =10v, v ds =5v v gs =10v, i d =11a m w v gs =4.5v, i d =9a r ds(on) static drain-source on-resistance maximum body-diode + schottky continuous current drain-source breakdown voltage on state drain current i s =1a,v gs =0v v ds =5v, i d =11a ma i dss zero gate voltage drain current i d =1ma, v gs =0v v gs =0v, v ds =15v, f=1mhz reverse transfer capacitance gate-body leakage current forward transconductance diode forward voltage t r 2.4 ns t d(off) 23 ns t f 4 ns t rr 5.5 7 8.5 ns q rr 5 6.5 8 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =11a, di/dt=500a/ m s turn-off fall time turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =1.4 w , r gen =3 w i f =11a, di/dt=500a/ m s body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user's spec ific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedence which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. rev 4: nov. 2011 www.aosmd.com page 2 of 9
ao4932 fet1: typical electrical and thermal characteristic s 17 52 10 0 18 0 5 10 15 20 25 30 35 1.5 1.8 2.1 2.4 2.7 3 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 6 8 10 12 14 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =4.5v i d =9a v gs =10v i d =11a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 5 10 15 20 25 30 35 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =2.25v 2.5v 10v 2.75v 4.5v 3v 18 40 voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 5 10 15 20 25 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =11a 25 c 125 c rev 4: nov. 2011 www.aosmd.com page 3 of 9
ao4932 fet1: typical electrical and thermal characteristic s 0 2 4 6 8 10 0 5 10 15 20 25 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 300 600 900 1200 1500 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =11a 1 10 100 1000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 10: single pulse power rating junction - t a =25 c 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) 10 m s 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms figure 10: single pulse power rating junction - to-ambient (note f) figure 9: maximum forward biased safe operating area (note f) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal impe dance (note f) in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =90 c/w t on t p d rev 4: nov. 2011 www.aosmd.com page 4 of 9
ao4932 fet1: typical electrical and thermal characteristic s 0 2 4 6 8 10 12 0 2 4 6 8 10 12 0 5 10 15 20 25 30 i rm (a) q rr (nc) i s (a) di/dt=800a/ m s 125oc 125oc 25oc 25oc q rr i rm 0 0.5 1 1.5 2 2.5 3 0 2 4 6 8 0 5 10 15 20 25 30 s t rr (ns) i s (a) di/dt=800a/ m s 125oc 125oc 25oc 25oc t rr s 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 0 50 100 150 200 i r (a) temperature (c) figure 12: diode reverse leakage current vs. junction temperature v ds =15v v ds =30v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 50 100 150 200 v sd (v) temperature (c) figure 13: diode forward voltage vs. junction temperature i s =1a 10a 20a 5a 40 i s (a) figure 14: diode reverse recovery charge and peak current vs. conduction current 0 2 4 6 8 10 0 2 4 6 8 10 0 200 400 600 800 1000 i rm (a) q rr (nc) di/dt (a/ m mm m s) figure 16: diode reverse recovery charge and peak current vs. di/dt 125oc 125oc 25oc 25oc i s =20a q rr i rm i s (a) figure 15: diode reverse recovery time and softness factor vs. conduction current 0 0.5 1 1.5 2 2.5 3 0 2 4 6 8 10 12 0 200 400 600 800 1000 s t rr (ns) di/dt (a/ m mm m s) figure 17: diode reverse recovery time and softness factor vs. di/dt 125oc 25oc 25oc 125oc i s =20a t rr s rev 4: nov. 2011 www.aosmd.com page 5 of 9
ao4932 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 10 m a v gs(th) gate threshold voltage 1.2 1.8 2.4 v i d(on) 40 a 15.5 19 t j =125c 21 25 18.6 23 m w g fs 30 s v sd 0.75 1 v i s 2.5 a c iss 600 740 888 pf c oss 77 110 145 pf c rss 50 82 115 pf r g 0.5 1.1 1.7 w q g (10v) 12 15 18 nc q g (4.5v) 6 7.5 9 nc q gs 2 2.5 3 nc q gd 2 3 5 nc t d(on) 5 ns t r 3.5 ns on state drain current output capacitance fet2 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions r ds(on) i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 16v zero gate voltage drain current m w v gs =4.5v, i d =4a drain-source breakdown voltage i d =250 m a, v gs =0v static drain-source on-resistance i s =1a,v gs =0v maximum body-diode continuous current input capacitance diode forward voltage dynamic parameters v gs =10v, v ds =5v v gs =10v, i d =8a gate-body leakage current switching parameters gate drain charge total gate charge reverse transfer capacitance v gs =0v, v ds =0v, f=1mhz gate resistance total gate charge v gs =10v, v ds =15v, i d =8a gate source charge v ds =5v, i d =8a v gs =0v, v ds =15v, f=1mhz forward transconductance turn-on delaytime turn-on rise time v gs =10v, v ds =15v, r l =1.8 w , t r 3.5 ns t d(off) 19 ns t f 3.5 ns t rr 6 8 10 ns q rr 14 18 22 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. turn-on rise time body diode reverse recovery charge i f =8a, di/dt=500a/ m s turn-off delaytime i f =8a, di/dt=500a/ m s v gs =10v, v ds =15v, r l =1.8 w , r gen =3 w body diode reverse recovery time turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environm ent with t a =25 c. the value in any given application depends on the user's specific bo ard design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junctio n temperature t j(max) =150 c. ratings are based on low frequency and duty cycles to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedence from junction to le ad r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtaine d using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambient the rmal impedence which is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. rev 4: nov. 2011 www.aosmd.com page 6 of 9
ao4932 fet2: typical electrical and thermal characteristic s 17 52 10 0 18 0 5 10 15 20 25 30 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 15 20 25 30 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =4.5v i d =4a v gs =10v i d =8a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 5 10 15 20 25 30 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =2.5v 3v 10v 3.5v 4v 5v 18 40 voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -i s (a) -v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 10 15 20 25 30 35 40 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =8a 25 c 125 c rev 4: nov. 2011 www.aosmd.com page 7 of 9
ao4932 p-channel: typical electrical and thermal characteri stics 0 2 4 6 8 10 0 3 6 9 12 15 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =8a 1 10 100 1000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 10: single pulse power rating junction - t a =25 c 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 -i d (amps) -v ds (volts) figure 9: maximum forward biased safe 10 m s 10s 1ms dc r ds(on) t j(max) =150 c t a =25 c 100 m s 10ms figure 10: single pulse power rating junction - to-ambient (note f) figure 9: maximum forward biased safe operating area (note f) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal impe dance (note f) in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja r q ja =90 c/w t on t p d rev 4: nov. 2011 www.aosmd.com page 8 of 9
ao4932 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & w aveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & w aveforms t t r d(on) t on t d(off) t f t off l vds bv unclamped inductive switching (uis) test circuit & w aveforms vds dss 2 e = 1/2 li ar ar vdd vgs id vgs rg dut - + vdc vgs vds id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev 4: nov. 2011 www.aosmd.com page 9 of 9
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